Product Summary
The LCMXO1200C4FT256C-3I belongs to MachXO family which is optimized to meet the requirements of applications traditionally addressed by CPLDs and low capacity FPGAs: glue logic, bus bridging, bus interfacing, power-up control, and control logic. The LCMXO1200C4FTN256C-3I brings together the best features of CPLD and FPGA devices on a single chip.
Parametrics
LCMXO1200C4FT256C-3I absolute maximum ratings: (1)Supply Voltage VCC: -0.5 to 3.75V; (2)Supply Voltage VCCAUX: -0.5 to 3.75V; (3)Output Supply Voltage VCCIO: -0.5 to 3.75V; (4)I/O Tristate Voltage Applied: -0.5 to 3.75V; (5)Dedicated Input Voltage Applied: -0.5 to 4.25V; (6)Storage Temperature (ambient): -65 to 150℃; (7)Junction Temp. (Tj): +125℃.
Features
LCMXO1200C4FT256C-3I features: (1)Non-volatile, Infinitely Reconfigurable; (2)Sleep Mode; (3)TransFR Reconfiguration; (4)High I/O to Logic Density; (5)Embedded and Distributed Memory; (6)Flexible I/O Buffer; (7)sysCLOCK PLLs; (8)System Level Support.
Diagrams
LCMX02280E-4MN132I |
Lattice |
SPLD - Simple Programmable Logic Devices INVALID PART I/O 1.2V |
Data Sheet |
Negotiable |
|
|||||||||||||
LCMXO1200C-3B256C |
Lattice |
CPLD - Complex Programmable Logic Devices 1200 LUTs 211 I/O 1.8/2.5/3.3V -3 SPD |
Data Sheet |
|
|
|||||||||||||
LCMXO1200C-3B256I |
Lattice |
CPLD - Complex Programmable Logic Devices 1200 LUTs 211 I/O 1.8/2.5/3.3V -3 SPD |
Data Sheet |
|
|
|||||||||||||
LCMXO1200C-3BN256C |
Lattice |
FPGA - Field Programmable Gate Array 1200 LUTs 211 I/O 1.8/2.5/3.3V -3 SPD |
Data Sheet |
|
|
|||||||||||||
LCMXO1200C-3BN256I |
Lattice |
FPGA - Field Programmable Gate Array 1200 LUTs 211 I/O 1.8/2.5/3.3V -3 SPD |
Data Sheet |
|
|
|||||||||||||
LCMXO1200C-3FT256C |
Lattice |
CPLD - Complex Programmable Logic Devices 1200 LUTs 211 IO 1.8 /2.5/3.3V -3 Spd |
Data Sheet |
|
|